1. Field of the Invention
The present invention relates to the utilization of dielectric layers that have low dielectric constants (k≦3.3) and have barrier properties to metal diffusion. More particularly, it relates to the use of the dielectric barrier layers in metal interconnect structures, which are part of integrated circuits and microelectronic devices. The primary advantage that is provided by this invention is the reduction in the capacitance between conducting metal features, e.g., copper lines, that results in an enhancement in overall chip performance.
2. Background Art
Materials which function as diffusion barriers to metal, may be incorporated in metal interconnect structures that are a part of integrated circuits. Diffusion barriers to metal are typically required to generate reliable devices, since low-k interlayer dielectrics typically do not prohibit metal diffusion. The placement of metal diffusion barrier materials in interconnect structures may differ and often is dependent upon the properties of the metal diffusion barrier and the means in which they are processed. Barrier layers comprised of metal and dielectrics are commonly utilized in interconnect structures.
Diffusion barrier layers, comprised of metal include, but are not limited to: tantalum, tungsten, ruthenium, tantalum nitride, titanium nitride, TiSiN, etc. Diffusion barrier layers often serve as liners, whereby they form a conformal interface with metal conducting structures. Normally, these materials are deposited by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), sputtering, thermal evaporation, and other related approaches. To utilize these materials as barrier layers, the metal barrier layers must be conformal to conducting metal lines and cannot be placed as blanket layers that would serve as conducting pathways.
There are numerous approaches in which this can be accomplished. One limiting criteria for these barrier layers is that their contribution to the resistivity of conducting metal lines must not be excessively high; otherwise, the increase in the total resistance of the metal conducting structures would result in reduced performance.
Diffusion barrier layers comprised of dielectrics including, but not limited to: silicon nitrides, silicon carbides, and silicon carbonitrides, are also utilized in microelectronic devices. These materials are normally deposited by chemical vapor deposition (CVD) and plasma-enhanced chemical vapor deposition (PECVD) approaches and can be deposited as continuous films. Unlike diffusion barrier layers comprised of metal, the dielectric layers can be deposited as blanket films and can be placed between conducting metal lines. In doing so, these dielectric layers contribute to the capacitance between metal lines. A limiting constraint of these systems is their relatively high dielectric constants (k=4.5 through 7.0) that result in a substantial increase in the effective dielectric constant between metal lines leading to reduced device performance. Decreasing the film thickness of these barrier layers can also lead to reductions in the effective dielectric constant “k”; however, insufficiently thick layers may not be reliable and nevertheless may still make a significant negative contribution to the dielectric constant. Another disadvantage of these systems is the cost and complexity associated with the tools and processes involved in their deposition.
Barrier layer films that are generated by spin-coating dielectrics, or other solvent based approaches, having an appropriate copper binding moiety to prohibit copper diffusion, have also been proposed. These systems are based on the addition of the copper binding moiety as an additive and have several potential drawbacks. Due to the lack of covalent bonding of the moiety to the dielectric matrix, the moiety may be expelled from the matrix by diffusion processes, solvent extraction, and thermolysis, resulting in a loss of the copper barrier properties.